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1. pulpissimo pulpissimo Public

   Forked from pulp-platform/pulpissimo

   This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

   SystemVerilog

2. pulp_soc pulp_soc Public

   Forked from pulp-platform/pulp_soc

   SystemVerilog

3. riscv riscv Public

   Forked from openhwgroup/cv32e40p

   RISCY is an in-order 4-stage RISC-V RV32IMFCXpulp CPU

   SystemVerilog