Event Machine (EM) on Open Data Plane (ODP): em-odp

The QuantLib C++ library

Make a cascading timeline from markdown-like text. Supports simple American/European date styles, ISO8601, images, links, locations, and more.

The Collected Algorithms of the ACM (CALGO)

真的没有QQ群、QQ频道、论坛。打包分发注意开源协议，保留出处，不守规矩就不要搞。

Universal Ctags Win32 daily builds

The HTML5 Creation Engine: Create beautiful digital content with the fastest, most flexible 2D WebGL renderer.

automatic-verilog based on vimscript

screen sharing for developers https://screego.net/

Open-source high-performance RISC-V processor

Verilator open-source SystemVerilog simulator and lint system

Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

Infinite canvas drawing/whiteboarding app for Windows, Linux and macOS. Made with Godot.

Must-have verilog systemverilog modules

A tree explorer plugin for vim.

Verilog parser, preprocessor, and related tools for the Verilog-Perl package

The Ultra-Low Power RISC-V Core

Dear PyGui: A Bloat-free Graphical User Interface for Python with minimal dependencies

AI-powered search engine

Open source SDR LTE software suite from Software Radio Systems (SRS)

This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The…

Awesome OCR toolkits based on PaddlePaddle （3.5M practical ultra lightweight OCR system, support training and deployment among server, mobile, embedded and IoT devices）

open-source IEEE802.11/Wi-Fi baseband chip/FPGA design

FPGA/hardware design of openwifi

My Blog / Jekyll Themes / PWA

The ultimate Vim configuration (vimrc)

Audio MODEM Communication Library in Python