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Python 2 Updated Nov 8, 2025

Distance-based Phylogenetic Placer

Cuda 14 1 Updated Nov 10, 2025

Easily build an UShER tree of genomes for any virus in RefSeq/GenBank

Python 6 1 Updated Nov 3, 2025
JavaScript 2 Updated Oct 27, 2025

Wastewater-Based Epidemiology using Phylogenetic Placements

C++ 13 1 Updated Nov 8, 2025

High throughput tool for tall and wide multiple sequence alignment.

C++ 20 1 Updated Nov 7, 2025

HLS-based framework to accelerate the implementation of 2-D DP kernels on FPGA

C++ 11 2 Updated Jun 20, 2025

Pangenome Mutation-Annotated Networks

C++ 15 6 Updated Oct 23, 2025

Tool for fully-automated inference of species trees from raw genome assemblies

Python 41 3 Updated May 27, 2025
C 15 2 Updated Aug 16, 2025

Lecture on viral phylodynamics

HTML 12 2 Updated Oct 28, 2021

SARS-CoV-2 Recombination Viewer and Tracker

JavaScript 6 1 Updated Nov 3, 2025

A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.

C++ 331 59 Updated Jan 20, 2025

Depth-weighted De-Mixing

HTML 125 38 Updated Nov 11, 2025
Jupyter Notebook 33 12 Updated Sep 10, 2024

OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

Verilog 2,262 729 Updated Nov 11, 2025

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

Python 3,311 430 Updated Oct 28, 2024

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

Assembly 2,678 847 Updated Nov 10, 2025

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

SystemVerilog 1,664 661 Updated Sep 19, 2025

RTL implementation of Flex-DPE.

Verilog 115 32 Updated Feb 22, 2020