A RISC-V BOOM Microarchitecture Power Modeling Framework

Host PC program to write/read data to/from Xilinx PCIe-XDMA

Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核

Domain-Specific Fuzzing with Waypoints

Pattern Fuzzing for Worst-Case Algorithmic Complexity using Program Synthesis

A Benchmark Suite for Cloud Services.

Multiple approaches to statistical simulation for computer architects

Mutation testing resources: how to make better code by introducing bugs

Fuzzing General-Purpose Hardware Designs with Software Fuzzers

DG-Miner is a high average utility pattern miner for critical path analysis of processor dependence graph.

A Chisel RTL generator for network-on-chip interconnects

Open-source high-performance RISC-V processor

Criticality-aware Framework for Modeling Computer Performance

ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis

An open-source EDA infrastructure and tools from netlist to GDS

为GPT/GLM等LLM大语言模型提供实用化交互接口，特别优化论文阅读/润色/写作体验，模块化设计，支持自定义快捷按钮&函数插件，支持Python和C++等项目剖析&自译解功能，PDF/LaTex论文翻译&总结功能，支持并行问询多种LLM模型，支持chatglm3等本地模型。接入通义千问, deepseekcoder, 讯飞星火, 文心一言, llama2, rwkv, claude2, m…

SystemC/TLM-2.0 Co-simulation framework

data preprocessing scripts for gem5 output

A LLM based research assistant that allows you to have a conversation with a research paper

Functional verification project for the CORE-V family of RISC-V cores.

Open-source high-performance non-blocking cache

Open-source non-blocking L2 cache

程序员延寿指南 | A programmer's guide to live longer

How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design

Open-source high-performance RISC-V processor

Reverse engineering Rosetta 2 on M1 Mac

Utilities to measure read access times of caches, memory, and hardware prefetches for simple and fused operations