一种通用CNN加速器

Architecture, requirements, documentation, SystemVerilog code, and testbenches for a low-end/budget phone SoC project.

Open source machine learning accelerators

Console-class GPU core with ray tracing, VRS support, and 2 TFLOPs compute performance for high-end mobile gaming. SystemVerilog RTL implementation.

A x86 Unix-like OS made entirely from scratch

Virtual Prototype for identifying Application Specific Hardware Optimization candidates

(Deprecated) SystemVerilog Implementations of CUDA/TensorCore/TPU GEMM Operations

PyTorchSim is a Comprehensive, Fast, and Accurate NPU Simulation Framework

Tropic01 RTL design

2-way Out of Order RISC-V Processor

Apache NuttX is a mature, real-time embedded operating system (RTOS).

A machine learning accelerator core designed for energy-efficient AI at the edge.

This repository is a collection of **industry-grade CDC primitives** that can be used as black-box IP in ASIC/FPGA flows and verified through both simulation and formal techniques.

This is a brand new implement of GPGPU called Koala GPU which will be compatible with NV GPU micro architecture starting from fermi. It should be regarded as an onward work for FlexGrip Plus

RISC-V Zve32x, Zve32f, Zvfh Vector Coprocessor

A massively spiffy yet delicately unobtrusive compression library.

Nano vLLM

Mobile operating system based on FreeRTOS™ optimized for E Ink displays - developed for Mudita Pure minimalist phone

Linux Debugging Training

A minimal GPU architecture implemented in Verilog, focusing on vector operations and parallel execution. Built as part of Seasons of Code 2025 (SoC) at IIT Bombay.

Open source compute hardware library.

Open-source Neural Processing Unit (NPU) from China ❤

This repository is a complete reference for learning and implementing Functional Coverage in SystemVerilog. It is designed for verification engineers and students who want to gain practical underst…

Open-Source Network-on-Chip for European Projects activities