RISC-V CPU Labs in Chisel

A simple hand-written lexer and parser which builds an AST out of user specified math expression.

Compact and Efficient RISC-V RV32I[MAFC] emulator

Comprehensive, categorized domain blocklists for web filtering on firewalls like pfSense, OPNsense, FortiGate, MikroTik, Sophos, Untangle, and others. Compatible with DNS-based filtering, custom UR…

Connect your devices into a secure WireGuard®-based overlay network with SSO, MFA and granular access controls.

Build your personal knowledge base with Trilium Notes

The basics of low-level concurrency in a sub-30 minute read

A python wrapper for the GitLab API.

C Programming Lab: Assessing Your C Programming Skills

Concurrency Primer

A Python library for creating LaTeX files

Web version of legal attest letter generator - based on Django

Scripts to build your own IPsec VPN server, with IPsec/L2TP, Cisco IPsec and IKEv2

Linux/OSX/FreeBSD resource monitor

PCB for ULX4M FPGA R&D board

wavedrom to verilog converter

Digital timing diagram editor

Community Helm Chart Repository

TrueNAS Container Storage Provider for HPE CSI Driver for Kubernetes

TrueNAS UI

Documenting the Lattice ECP5 bit-stream format.

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

Place and route tool for FPGAs

nextpnr portable FPGA place and route tool

SystemVerilog compiler and language services

VHDL 2008/93/87 simulator

OpenSource HummingBird RISC-V Software Development Kit

Deprecated, please go to https://github.com/riscv-mcu/hbird-sdk/

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2