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iic-jku / IIC-OSIC-TOOLS
Forked from efabless/foss-asic-toolsIIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.
3 bit sar adc with real mixed signal simulation using xschem, ngspice, and verilator. Transistors used are from the open source sky130 PDK. Features a 3 bit DAC, fed into a sample and hold circuit,…
8-bit Simple Processor on FPGA with a custom Assembler in C++. Check out the documentation thru the link below!
Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
CLEAR is an Open Source FPGA ASIC delivered to you on its development board and its open source software development tools and all the ASIC design tools used to create it.
Arm Cortex-M0 based Customizable SoC for IoT Applications
Universal Asynchronous Receiver/Transmitter (UART) with FIFOs Soft IP
Silicon-validated SoC implementation of the PicoSoc/PicoRV32
FPGA dev board based on Lattice iCE40 8k
Functional verification project for the CORE-V family of RISC-V cores.
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design
This is a beginner-friendly tutorial on MLIR from the perspective of a user of MLIR, not a compiler engineer. This tutorial will introduce why MLIR exists and how it is used to compile code at diff…
Verilog to Routing -- Open Source CAD Flow for FPGA Research
Tile based architecture designed for computing efficiency, scalability and generality
A comparison of operating systems written in Rust
Course material for a basic hands-on analog circuit design course with IC emphasis
MobileLLM Optimizing Sub-billion Parameter Language Models for On-Device Use Cases. In ICML 2024.
With Field Oriented Control (FOC)
Multi-platform nightly builds of open source digital design and verification tools