Caliptra IP and firmware for integrated Root of Trust block

Pre-packaged testbenching tools and reusable bus interfaces for cocotb

A Python toolbox for building complex digital hardware

The original high performance and small footprint system-on-chip based on Migen™

nextpnr portable FPGA place and route tool

An open-source AI agent that brings the power of Gemini directly into your terminal.

Small footprint and configurable Inter-Chip communication cores

Edit, preview and share mermaid charts/diagrams. New implementation of the live editor.

一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介紹了 BSV 的調度（Scheduling）、FIFO 數據流（FIFO Dataflow）、多態（Polymorphism） 等高級特性，展示了 BSV 相比於傳統 Verilog 開發的優勢。

Bluespec Compiler (BSC)

draw.io is a JavaScript, client-side editor for general diagramming.

Home of the Joomla! Content Management System

A collection of themes for vim-airline

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

The ZenUML renderer

Side-channel analysis setup for OpenTitan

Realtime tool for generating sequence diagrams.

AI-Powered Hardware Design & Verification Copilot

PKGBUILDs modified to build on Arch Linux ARM

Small footprint and configurable Ethernet core

Small footprint and configurable PCIe core

Open-source search and retrieval database for AI applications.

Model Context Protocol Servers

Board definitions for Amaranth HDL

Python Enhancement Proposals

Veryl: A Modern Hardware Description Language

Work-in-progress C90 implementation of ML-DSA / FIPS 204