A set of pacman packaging utilities.

Verilog library for ASIC and FPGA designers

A wrapper for GHDL to make it look like Mentor's ModelSim. Helpful for use with programs like Sigasi.

draws an SVG schematic from a JSON netlist

A Hugo theme based on Bulma.io

VHDL related news.

XicTools: Xic graphical editor, WRspice circuit simulator, and accessories. for electronic design.

USB/IP for Windows

Experiments with hidden COM interface and LxBus IPC mechanism in WSL

VUnit GitHub action

📊 The statistical analysis tool for git repositories

VUnit GitHub action. Moved here: https://github.com/VUnit/vunit_action

Verilator open-source SystemVerilog simulator and lint system

GitHub Action to setup MSYS2

The LumenPnP is an open source pick and place machine.

Examples and design pattern for VHDL verification

Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)

What the f*ck Python? 😱

Scripts to build and use docker images including GHDL

a project to check the FOSS synthesizers against vendors EDA tools

A self-contained online book containing a library of FPGA design modules and related coding/design guides.

Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. Used as a compiled interchange format …

Dockerized Kodi with audio and video

Termux - a terminal emulator application for Android OS extendible by variety of packages.

A package build system for Termux.

Gcc for termux with fortran scipy etc... Use apt for newest updates instructions in README.txt

Simple GraphQL Client

Trying to verify Verilog/VHDL designs with formal methods and tools

Tests to evaluate the support of VHDL 2008 and VHDL 2019 features

An alpine linux environment for building apk packages using docker