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The COMIX-35 is an improved clone of the COMX-35 1802 home computer

125 19 Updated Aug 6, 2020

Simple and memory-efficient implementation of OOP in C suitable for real-time embedded systems.

C 256 41 Updated Dec 6, 2023

An FPGA-based mechanical keyboard with an integrated USB hub and communication interfaces

VHDL 188 7 Updated Sep 29, 2025

Github mirror of os dev repo

C 72 11 Updated Mar 6, 2025

80486 on the Sipeed Tang Console 138K FPGA

Verilog 82 10 Updated Sep 15, 2025

Embeddable Linux Kernel Subset - Linux for 8086

C 1,462 141 Updated Nov 8, 2025

ECP5 FPGA Dev Board in a Pi Zero form

HTML 703 26 Updated Oct 11, 2025
C 79 27 Updated Aug 28, 2025

Vertigo Flight Simulator

C 6 Updated Jun 24, 2021

Isle FPGA Computer

Verilog 42 1 Updated Oct 30, 2025

Design implementation of the RV32I Core in Verilog HDL with Zicsr extension

Verilog 115 10 Updated Dec 17, 2023

My completed projects from "FPGA Prototyping by Verilog Examples" book by Pong P. Chu

Verilog 154 24 Updated Jul 28, 2021

Transputer T805 emulator, assembler, Pascal compiler, operating system, and K&R C compiler.

C 78 4 Updated Oct 5, 2025

5-stage RISC-V CPU, originally developed for RISCBoy

Verilog 34 1 Updated Jul 1, 2023

A SoC for DOOM

Verilog 19 2 Updated Apr 11, 2021

VRoom! RISC-V CPU

Verilog 511 29 Updated Sep 2, 2024

A c/RISCV of "Let's Build a Compiler" by Jack Crenshaw

C 117 9 Updated Sep 26, 2022

Tiny RISC-V machine code monitor written in RISC-V assembly.

Assembly 54 5 Updated Nov 4, 2025

A highly-configurable RISC-V Core

SystemVerilog 25 4 Updated Nov 9, 2025

Zeitlos SOC/OS

Verilog 11 2 Updated Jul 15, 2025

SystemVerilog to Verilog conversion

Haskell 671 60 Updated Nov 2, 2025

Verilog AXI components for FPGA implementation

Verilog 1,841 509 Updated Feb 27, 2025

RISC-V CPU Core (RV32IM)

Verilog 1,562 272 Updated Sep 18, 2021

32-bit Superscalar RISC-V CPU

Verilog 1,121 196 Updated Sep 18, 2021

SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.

SystemVerilog 218 45 Updated Aug 25, 2020

A rasterizer I'm building in C using the Watcom compiler for MS-DOS

C 4 Updated Feb 26, 2025

A tiny educational OS for RISC-V

C 26 5 Updated Oct 14, 2024

First realtime 3D adventure/shooter

C 127 7 Updated Jul 20, 2023

A 3D FPGA GPU for real-time rasterization with a tile-based deferred rendering (TBDR) architecture, featuring transform & lighting (T&L), back-face culling, MSAA anti-aliasing, ordered dithering, etc.

C++ 245 13 Updated Jan 2, 2025
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