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    • PeakRDL-ipxact

      Public
      Import and export IP-XACT XML register models
      Python
      17000Updated Nov 5, 2025Nov 5, 2025
    • i3c-core

      Public
      SystemVerilog
      12000Updated Nov 5, 2025Nov 5, 2025
    • verilator

      Public
      Verilator open-source SystemVerilog simulator and lint system
      C++
      7132200Updated Nov 5, 2025Nov 5, 2025
    • renode

      Public
      Renode - virtual development tool for multinode embedded networks
      RobotFramework
      3753600Updated Nov 5, 2025Nov 5, 2025
    • dts2repl

      Public
      Python
      72532Updated Nov 5, 2025Nov 5, 2025
    • github-runner-test

      Public
      Shell
      3002Updated Nov 5, 2025Nov 5, 2025
    • hardware-components

      Public
      Python
      23500Updated Nov 5, 2025Nov 5, 2025
    • zephyr

      Public
      Primary GIT Repository for the Zephyr Project
      C
      8.2k1210Updated Nov 5, 2025Nov 5, 2025
    • tlib

      Public
      C++
      382103Updated Nov 5, 2025Nov 5, 2025
    • verilator-verification

      Public
      Test dashboard for verification features in Verilator
      SystemVerilog
      52800Updated Nov 5, 2025Nov 5, 2025
    • f4pga-arch-defs

      Public
      FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
      Jupyter Notebook
      1151010Updated Nov 5, 2025Nov 5, 2025
    • rdfm

      Public
      Python
      83600Updated Nov 5, 2025Nov 5, 2025
    • Python
      21500Updated Nov 5, 2025Nov 5, 2025
    • sv-tests

      Public
      Test suite designed to check compliance with the SystemVerilog standard.
      SystemVerilog
      842022Updated Nov 4, 2025Nov 4, 2025
    • designer-graphs

      Public
      0000Updated Nov 4, 2025Nov 4, 2025
    • guineveer

      Public
      C
      2000Updated Nov 4, 2025Nov 4, 2025
    • designer-media-files

      Public
      0000Updated Nov 4, 2025Nov 4, 2025
    • caliptra-ss

      Public
      HW Design Collateral for Caliptra Subsystem, which comprises Caliptra RoT IP and additional manufacturer controls.
      SystemVerilog
      31000Updated Nov 4, 2025Nov 4, 2025
    • 🔬 A fast, interactive web-based viewer for performance profiles.
      TypeScript
      294000Updated Nov 4, 2025Nov 4, 2025
    • Python
      3500Updated Nov 4, 2025Nov 4, 2025
    • TermSharp

      Public
      Terminal widget for XWT with VT100 support
      C#
      41402Updated Nov 3, 2025Nov 3, 2025
    • xwt

      Public
      C#
      241000Updated Nov 3, 2025Nov 3, 2025
    • uvmdvgen

      Public
      SystemVerilog
      2300Updated Nov 3, 2025Nov 3, 2025
    • Jupyter Notebook
      0110Updated Nov 3, 2025Nov 3, 2025
    • 0000Updated Nov 3, 2025Nov 3, 2025
    • girdl

      Public
      A plugin for Ghidra for automatic analysis of the binding of individual registers and their layouts.
      Java
      01200Updated Nov 3, 2025Nov 3, 2025
    • OpenROAD

      Public
      OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
      Verilog
      728200Updated Nov 3, 2025Nov 3, 2025
    • Docker image suitable for development, similar to what we have in CI
      Dockerfile
      104000Updated Oct 31, 2025Oct 31, 2025
    • xls

      Public
      XLS: Accelerated HW Synthesis
      C++
      213001Updated Oct 31, 2025Oct 31, 2025
    • GitHub Action allowing to run tests in the Renode framework
      Python
      62001Updated Oct 31, 2025Oct 31, 2025