Cap'n Proto for Rust

Cap'n Proto serialization/RPC system - core tools and C++ library

Hire the top 1% OSS engineers

DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator

SystemC Reference Implementation

DRAMSys a SystemC TLM-2.0 based DRAM simulator.

IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.

FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already installed and ready to use.

High quality and composable libraries in DSLX

Error correcting code solver

a GitHub action to run `pre-commit`

pre-commit hook to automatically download buildifier and run it

"Next-Generation" Bazel Rules for DSLX and XLS/XLSynth based projects

High quality and composable RTL libraries in SystemVerilog

Rust library for managing coalesced intervals.

8-bit floating point types for Rust

Virtual whiteboard for sketching hand-drawn like diagrams

Browser extension that simplifies the GitHub interface and adds useful features

A tool for working with stacked PRs on github.

Stacked Pull Requests on GitHub

Official inference framework for 1-bit LLMs

RTL data structure

Half-precision floating point types f16 and bf16 for Rust.

Lightweight coding agent that runs in your terminal

A federated search API for finding image thumbnails for book covers.

📚 Simple API for retrieving book covers from the web

Submit pull requests for individual, amendable, rebaseable commits to GitHub

Common SystemVerilog components

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication