Approximate MAC verilog implementation based on the MACISH work by G. A. Gillani et al.

An open source GPU based off of the AMD Southern Islands ISA.

Enso Analytics is a self-service data prep and analysis platform designed for data teams.

Weighs the soul of incoming HTTP requests to stop AI crawlers

Educational Design Kit for Synopsys Tools with a set of Characterized Standard Cell Library

Hardware Formal Verification Tool

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…

32-bit Superscalar RISC-V CPU

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

Simulate electronic circuit using Python and the Ngspice / Xyce simulators

Deluxe RISC processor

Index of the fully open source process design kits (PDKs) maintained by Google.

PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

A Video Game Music player based on the YM3812 (OPL2) and Teensy 3.5

An educational software system of a tiny self-compiling C compiler, a tiny self-executing RISC-V emulator, and a tiny self-hosting RISC-V hypervisor.

Mixin is a trait/mixin and bytecode weaving framework for Java using ASM

Tcl Debug extension for VS Code

Various tools for Git

A concolic testing engine for RISC-V embedded software with support for SystemC peripherals

RISC-V Assembly Programmer's Manual

RISC-V Formal Verification Framework

RISC-V Verification Interface

Painless relocation of Linux binaries–and all of their dependencies–without containers.

A RISC-V ELF psABI Document

A RISC-V RV32 model ready for SMT program synthesis.

repo to house various LLVM based SIHFT passes for RISCV 32/64 soft error resilience