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AES-128-Verilog
AES-128-Verilog PublicThis is a Verilog implementation of AES-128 encryption, including key expansion and encryption rounds. It can be simulated using Icarus Verilog (iverilog) and visualized with GTKWave.
Verilog
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docs
docs PublicForked from unikraft/docs
The front page and documentation for the Unikraft Open-Source Project.
MDX
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lib-newlib
lib-newlib PublicForked from unikraft/lib-newlib
Unikraft port of newlib, a C standard library
C
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lib-pthread-embedded
lib-pthread-embedded PublicForked from unikraft/lib-pthread-embedded
Unikraft port of pthread-embedded, an embedded pthread library
C
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lib-redis
lib-redis PublicForked from unikraft/lib-redis
Unikraft port of Redis in-memory data structure store
C
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