Skip to content
View EajksEajks's full-sized avatar
🎯
Focusing
🎯
Focusing

Organizations

@by-EAjks-Com

Block or report EajksEajks

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Starred repositories

Showing results

🧰 A zero trust swiss army knife for working with X509, OAuth, JWT, OATH OTP, etc.

Go 4,064 286 Updated Nov 25, 2025

🛡️ A private certificate authority (X.509 & SSH) & ACME server for secure automated certificate management, so you can use TLS everywhere & SSO for SSH.

Go 7,881 511 Updated Nov 25, 2025

OSVVM submodule for Co-simulation features

C++ 7 5 Updated Sep 21, 2025

OSVVM UART Verification Components. Uart Transmitter with error injection for parity, stop, and break errors. UART Receiver verification component with error handling for parity, stop, and break er…

VHDL 13 12 Updated Sep 21, 2025

OSVVM Ethernet Library

VHDL 8 8 Updated Sep 21, 2025

OSVVM project simulation scripts. Scripts are tedious. These scripts simplify the steps to compile your project for simulation

Tcl 14 23 Updated Nov 22, 2025

Packages that implement OSVVM's model independent transactions and other shared verification component support packages. Required for all OSVVM verification components. AddressBusTransactionPkg - A…

VHDL 9 11 Updated Nov 18, 2025

AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream transmitter and receiver verification components

VHDL 143 23 Updated Nov 18, 2025

OSVVM Documentation

36 9 Updated Nov 22, 2025

Open, Multi-Cloud, Multi-Cluster Kubernetes Orchestration

Go 5,158 1,027 Updated Nov 29, 2025

This repository is a subset of UVVM with Utility library and BFMs, and is intended as a UVVM starting platform for thos who only need the Utility Library and BFMs. Community forum: https://forum.uv…

VHDL 22 14 Updated Nov 28, 2025

UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improv…

VHDL 414 107 Updated Nov 29, 2025

OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...

VHDL 252 72 Updated Nov 22, 2025

A lightweight, embeddable software-defined radio framework built on LuaJIT

Lua 631 65 Updated Nov 19, 2025

digital signal processing library for software-defined radios

C 2,124 480 Updated Nov 16, 2025

🆙 Upscayl - #1 Free and Open Source AI Image Upscaler for Linux, MacOS and Windows.

TypeScript 41,433 1,959 Updated Nov 17, 2025

🔏 Keycloak theming for the modern web

TypeScript 2,229 249 Updated Nov 26, 2025

The flexible backend for all your projects 🐰 Turn your DB into a headless CMS, admin panels, or apps with a custom UI, instant APIs, auth & more.

TypeScript 33,583 4,482 Updated Nov 28, 2025

Payload is the open-source, fullstack Next.js framework, giving you instant backend superpowers. Get a full TypeScript backend and admin panel instantly. Use Payload as a headless CMS or for buildi…

TypeScript 39,082 3,143 Updated Nov 28, 2025

Bluespec Compiler (BSC)

Haskell 1,063 164 Updated Nov 18, 2025

The repo will be used to hold the draft non-ISA RISC-V ACPI Functional Fixed Hardware (FFH) specification

Makefile 5 6 Updated Aug 28, 2025

RISC-V ACPI I/O Mapping Table Specification

Makefile 7 4 Updated Nov 28, 2025

RISC-V Nexus Trace TG documentation and reference code

C 55 39 Updated Jan 3, 2025

The RAS Error-record Register Interface provides a specification to augment RAS features in RISC-V SOC hardware to standardize reporting and logging of errors by means of a memory-mapped register i…

TeX 10 8 Updated Nov 1, 2025

E-Trace Encapsulation Specification

Makefile 7 4 Updated Aug 28, 2025

The repo holds the draft non-ISA Server SoC specification being developed by the Server SoC specification TG and to release intermediate releases of the specification on milestones. Further downstr…

TeX 28 13 Updated Nov 27, 2025

Documentation for the RISC-V Supervisor Binary Interface

Makefile 442 99 Updated Nov 27, 2025
Makefile 34 7 Updated May 9, 2022
Next